Large scale integration of circuits into semiconductor chips has resulted in very dense circuits with relatively small geometries. As the geometries are decreased, the operating temperature of the chip increases. This is an additive effect due to the large number of elements on the chip that dissipate heat and the proximity thereof. In a circuit with low density, this heat is easily extracted. However, when the density increases, this additive effect is exacerbated since the amount of heat generated per unit of square area increases without a corresponding decrease in the thermal resistance between the circuit and the heat sink.
Conventional packaging techniques for low cost semiconductor devices utilize some form of mounting substrate which defines a lead pattern for bonding of the chip thereto and also a mounting surface. Depending upon the type of chip to be mounted on the surface and the application thereof, the thermal properties of the mounting surface can vary. For example, in consumer applications, the temperature extremes that a packaged chip will be subjected to are less than that for a military qualified package. Therefore, the thermal match between the chip and the mounting surface for the military application is of greater importance. If the thermal expansion coefficient of the mounting circuit varies greatly from that of the chip, the chip can be subjected to undesirable stresses during temperature cycling. Therefore, it is desirable to have the thermal expansion coefficients of both the chip and the mounting surface match as close as possible.
Another factor that is desirable for the mounting surface is a high thermal conductivity. This is necessary to reduce the temperature drop between the temperature on the active surface of the chip and the peripheral sides of the mounting surface. By reducing the surface temperature of the chip, a higher reliability is realized. Present mounting surfaces utilize such materials as aluminum oxide and various alloys. The aluminum oxide has relatively good thermal conductivity but its thermal expansion coefficient is approximately 60% greater then that of silicon, the conventional material from which semiconductor chips are fabricated. If a thermal expansion mismatch exists between the silicon chip and the mounting surface, severe stresses can be generated due to large temperature variations during temperature cycling of a mounted device. These stresses can cause cracking in the semiconductor chip if not controlled.
In view of the various requirements for mounting surfaces, there exists a need for a mounting surface which provides both adequate thermal conduction properties and also provides a thermal expansion coefficient that approximates the thermal expansion coefficient of the semiconductor chip mounted thereon.